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Google Negotiates 1.4nm and 2nm Process Split for Icefish AI Chip

Lena Fischer 1 min read

Google is negotiating a dual- foundry strategy for its Icefish TPU, assigning the compute die to TSMC on 1.4nm and the memory I/O die to Samsung on 2nm.

Google Icefish TPU chip architecture diagram showing manufacturing split
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Google is negotiating a manufacturing split for its next-generation AI processor. The company plans to divide production between TSMC and Samsung. This arrangement targets the release of the tenth-generation Tensor Processing Unit, codenamed Icefish.

Google splits manufacturing between TSMC and Samsung for the tenth-generation Tensor Processing Unit.

The Icefish architecture relies on two distinct semiconductor nodes. TSMC will manufacture the main compute die using a 1.4nm process technology. Samsung would handle the separate memory I/O die using its advanced 2nm node.

Google Icefish TPU chip architecture diagram showing manufacturing split
Google Icefish TPU chip architecture diagram showing manufacturing split

This dual-foundry strategy leverages specific capabilities at each manufacturer. Samsung possesses integrated high-bandwidth memory and packaging resources that influenced Google's decision. The deal complements ongoing discussions between Google and Intel for other production needs.

Mass production for the Icefish chip is potentially scheduled to begin in 2028. Google co-develops the architecture with MediaTek. Reports indicate these manufacturing talks are active but remain unconfirmed by either company.

Source: TweakTown

Intel

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