CXMT G5 DRAM Mass Production Adds 50% More Dies Per Wafer

CXMT has pushed its fifth-generation DRAM platform, called G5, into mass production, a move that directly impacts the supply chain for Chinese flagship smartphones. This development provides a new domestic memory source for high-end devices that previously relied on imported components. The availability of a local LPDDR5X source may help stabilize supply chains and provide alternative procurement options for smartphone manufacturers.

New 24Gb LPDDR5X chips ship in Chinese flagship smartphones

The G5 platform serves as the technical foundation for two new 24Gb LPDDR5X products, available in both 496-ball and 245-ball packages. These chips are already shipping in mainstream Chinese flagship smartphones, marking the first commercial deployment of this specific memory architecture. The integration of these components into consumer devices demonstrates that the manufacturing process has moved beyond the lab and into active production cycles.

Specifications

• Process Technology: Self-aligned quadruple patterning, 11.95nm half-pitch
• Capacitor Aspect Ratio: 45:1
• Cell Array Height: 6,762nm
• New Products: 24Gb LPDDR5X (496-ball and 245-ball packages)
• Die Density Improvement: 50% more gross dies per wafer (8Gb-equivalent basis)

CXMT achieved these results by employing self-aligned quadruple patterning, which allows the company to shrink the active-area half-pitch in its memory array to 11.95nm. The company also reached a 45:1 capacitor aspect ratio and reduced its core cell array height to 6,762nm using a high-k metal gate process adapted specifically for DRAM. These technical adjustments form the basis for the platform's improved density and efficiency metrics.

The headline figure for this generation is a 50% increase in gross dies per wafer compared to CXMT's previous-generation platform, calculated on an 8Gb-equivalent basis. CXMT VP Luo Xiaodong stated at a convention that the company's process capability is now on par with the most advanced mass-produced nodes in the industry. However, TechInsights VP Choi Jung-dong noted at an August webinar that CXMT remains roughly two generations behind the leading DRAM makers despite these recent advances.

Previous CXMT memory launches were reviewed in the context of domestic semiconductor progress. The company is also planning a NAND R&D production line in Beijing, signaling a broader expansion of its storage and memory manufacturing capabilities. This confirms that CXMT is actively scaling its infrastructure to support both DRAM and NAND production in the coming years.

Source: TweakTown