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Huawei Mate 90 Series Chipset Features Tau Architecture for Near-3nm Performance

NicoGG 3 min read

Huawei Mate 90 series chipset uses Tau design principle to achieve near-3nm performance levels with improved power efficiency and clock speeds.

Huawei is preparing to launch the Mate 90 series with a new chipset built around its Tau design principle, marking a significant shift in its semiconductor strategy. The company revealed details about this architecture through executive Zheng Jun, signaling a push toward advanced logic stacking techniques that aim to improve performance and efficiency without relying on traditional process nodes.

New logic stacking architecture boosts transistor density and power efficiency significantly

The core of the Mate 90 lineup will be a processor leveraging the Tau (τ) design principle, which utilizes logic stacking to arrange transistors in three dimensions. This approach allows Huawei to achieve a transistor density of approximately 238 million per square millimeter, representing a 53.5 percent improvement over previous designs. The company has reportedly integrated this chipset into the Mate 90 series devices already.

  • Chipset Architecture: Tau (τ) design principle with logic stacking architecture
  • Transistor Density: 238 million transistors per square millimeter (53.5% improvement)
  • Performance Core Power Efficiency: 41% improved power efficiency
  • Peak Clock Speeds: 12.7% increase
  • Performance Comparison: Close to ’s 18A process and early-generation TSMC 3nm technology

Technical improvements from the Tau architecture include a 41 percent boost in power efficiency for performance cores and a 12.7 percent increase in peak clock speeds. These gains suggest that Huawei is optimizing both energy consumption and raw processing capability within its new chip platform. The design aims to deliver near-3nm-class performance levels, according to internal claims from the company.

Performance benchmarks indicate that the Tau-based chipset approaches the capabilities of Intel’s 18A process and early-generation TSMC 3nm technology. While Huawei has not released independent verification data, reports suggest these performance targets are achievable within the Mate 90 series hardware. The architecture represents a strategic move to compete with established semiconductor leaders despite external supply constraints.

The Mate 90 series is expected to debut in China around September of this year, according to leak-based timelines. Huawei has not officially confirmed the final branding for the chipset, though recent reports suggest it may launch as the Kirin 9050 Pro. The company continues to keep official details under wraps until closer to the product release window.

Industry observers note that Huawei’s progress in logic stacking and transistor density reflects a broader effort to maintain competitiveness in high-end smartphone processors. Previous iterations of the Kirin series have faced limitations due to manufacturing restrictions, making this new architecture a critical milestone for the vendor. The Tau design principle appears to be a foundational element in Huawei’s long-term semiconductor roadmap.

If the reported performance claims hold true, the Mate 90 series could offer flagship-level capabilities without relying on external foundry partnerships. The integration of advanced power efficiency and clock speed improvements positions the device as a strong contender in the Chinese market. Consumers will likely see these benefits reflected in battery life and sustained performance during intensive tasks.

Source: GIZMOCHINA